Pre-Silicon Verification for Hardware Security & IP Robustness (m/f/d)
Apple München
Pre-Silicon Verification for Hardware Security & IP Robustness (m/f/d) Munich Bavaria-Bayern Germany Hardware Summary Posted: 25. Sep 2024 Role Number: 200569759 Join a rapidly growing team at our Munich design center. At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly.
The AMS IP team owns a wide portfolio of IPs & complete subsystems going to all the Apple products. In this context the Design Verification Engineer will have to interface with many different teams at Apple and build knowledge of many chips & platforms in order to bring system-level understanding into the verification flow.
The responsibility goes end-to- end: starting at the specification level, defining the verification strategy & plan, executing the verification, doing performance analysis and handling all the different quality metrics to signoff the verification.
This internship would a solid background in object oriented programming. The intern will have to learn about hardware security and pre-silicon verification techniques. After this state-of-the-art analysis, the intern will propose a proof-of-concept solution along with its implementation.
The AMS IP team owns a wide portfolio of IPs & complete subsystems going to all the Apple products. In this context the Design Verification Engineer will have to interface with many different teams at Apple and build knowledge of many chips & platforms in order to bring system-level understanding into the verification flow.
The responsibility goes end-to- end: starting at the specification level, defining the verification strategy & plan, executing the verification, doing performance analysis and handling all the different quality metrics to signoff the verification.
This internship would a solid background in object oriented programming. The intern will have to learn about hardware security and pre-silicon verification techniques. After this state-of-the-art analysis, the intern will propose a proof-of-concept solution along with its implementation.
Key case studies will be used to refine the approach and optimize it. Definitions of the flows and tools to integrate the solution into the standard verification life-cycle will be addressed. Description Currently enrolled in a Master’s degree in Computer Science or equivalentKnowledge of Object Oriented ProgrammingKnowledge of Verilog and/or VHDLPassionate about mathematicsScripting language knowledge (perl/python)Good written and verbal communication skillsExperience in working with international teams
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